230000000875 corresponding Effects 0.000 claims description 23.239000006185 dispersion Substances 0.000 claims description 32.Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Priority to GBGB9622728.5A priority Critical patent/GB9622728D0/en Priority to GB9622728 priority Priority to GB9720550A priority patent/GB2318953A/en Priority to GB9720550 priority Application filed by Discovision Associates filed Critical Discovision Associates Priority to PCT/US1997/018911 priority patent/WO1998019410A2/en Publication of AU5147198A publication Critical patent/AU5147198A/en Application granted granted Critical Publication of AU727726B2 publication Critical patent/AU727726B2/en Anticipated expiration legal-status Critical Status Ceased legal-status Critical Current Links
Original Assignee Discovision Associates Priority date (The priority date is an assumption and is not a legal conclusion.
Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) ( en Inventor Dawood Alam Matthew James Collins David Huw Davies Thomas Foxcroft Peter Anthony Keevill John Matthew Nolan Jonathan Parker Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Ceased Application number AU51471/98A Other versions AU5147198A
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Google Patents Single chip VLSI implementation of a digital receiver employing orthogonal frequency division multiplexingĭownload PDF Info Publication number AU727726B2 AU727726B2 AU51471/98A AU5147198A AU727726B2 AU 727726 B2 AU727726 B2 AU 727726B2 AU 51471/98 A AU51471/98 A AU 51471/98A AU 5147198 A AU5147198 A AU 5147198A AU 727726 B2 AU727726 B2 AU 727726B2 Authority AU Australia Prior art keywords data tmpl signal receiver output Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. Google Patents AU727726B2 - Single chip VLSI implementation of a digital receiver employing orthogonal frequency division multiplexing AU727726B2 - Single chip VLSI implementation of a digital receiver employing orthogonal frequency division multiplexing
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